1. Describe the basic components of a CMOS transistor? 2. Draw a CMOS invertor and regions of operation ? efforct of sizing ? 3. Metal layers and process ?why do VLSI chips have multiple metal layers? What are these used for? Why so many? 4. What is drive strength? 5. Are N and P devices sized the same? Why ? 6. How do you measure wire delay ? 7. What do mean by coupling-noise ? 8. How do you size Nand gate ? 9. Draw transistor level of 2 input NAND gate (SCHEMATIC)? 10. Draw transistor level of 2 input NAND gate (Layout )? 11. What do we mean by Synthesis design ? How it is different than manual design, draw flow chart for both with tools used 12. Describe silicon technology scaling and trends 13. When will you use top down or bottom up approach for Floorplan and routing ? 14. What are the basic design matrixes? 15. Draw a circuit that has a 10pF capacitor in series with an nmos transistor in series with a 1pf capacitor. The drain of the transistor is connected to one capacitor and the source to the other. Initially the capacitor is charged to 1V and the 1pF capacitor is discharged. The gate of the transistor is initially at 0 volts. What happens to the voltage across the 1pF capacitor if the gate of the transistor is changed to 5V? Assume the transistor is an ideal switch. 16. Resistors - Ohm law – Give an example of serial and parallel resistors. And how can you calculate the equivalent of that 17. Current flow in CMOS? From where to where? 18. What is delay of logic cell? Where the delay of net comes from? 19. Mode of operation of transistor ? P and N devices 20. If we connect device in series how does that affect threshold ? 21. If you have wire , How do you calculate its resistance? 22. If you want to reduce the leakage, will you use the high threshold or the low threshold. 23. What or how does the temperature affect speed, and power 24. If we have 2 wires , how do you calculate the capacitance between them ? 25. solve all HW questions and see how can you calculate IR drop, when device ois on/off and in what mode based on drain, source and gate voltages 26. How can youmesure delay ? slopes of signal ? 27. draw device and layout for complex gate