{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 24 15:18:06 2010 " "Info: Processing started: Wed Mar 24 15:18:06 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off seven -c seven " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off seven -c seven" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "seven.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file seven.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 seven " "Info: Found entity 1: seven" {  } { { "seven.bdf" "" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_TOP" "seven " "Info: Elaborating entity \"seven\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0 -1}
{ "Warning" "WSGN_SEARCH_FILE" "sevenseg.v 1 1 " "Warning: Using design file sevenseg.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 sevenseg " "Info: Found entity 1: sevenseg" {  } { { "sevenseg.v" "" { Text "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/sevenseg.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!llu! design units and %3!llu! entities in project" 0 0 "" 0 -1}
{ "Warning" "WSGN_SKIP_FILE_CANDID_TOP" "sevenseg " "Warning (12300): Found the following files while searching for definition of entity \"sevenseg\", but did not use these files because already using a different file containing the entity definition" { { "Warning" "WSGN_SKIP_FILE_CANDID_SUB" "sevenseg.bdf " "Warning: File: sevenseg.bdf" {  } {  } 0 0 "File: %1!s!" 0 0 "" 0 -1}  } {  } 0 12300 "Found the following files while searching for definition of entity \"%1!s!\", but did not use these files because already using a different file containing the entity definition" 0 0 "" 0 -1}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sevenseg sevenseg:inst " "Info: Elaborating entity \"sevenseg\" for hierarchy \"sevenseg:inst\"" {  } { { "seven.bdf" "inst" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { { 80 240 368 176 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_TM_SUMMARY" "18 " "Info: Implemented 18 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "4 " "Info: Implemented 4 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_OPINS" "7 " "Info: Implemented 7 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 -1} { "Info" "ICUT_CUT_TM_LCELLS" "7 " "Info: Implemented 7 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 -1}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 3 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "196 " "Info: Peak virtual memory: 196 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Wed Mar 24 15:18:08 2010 " "Info: Processing ended: Wed Mar 24 15:18:08 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Wed Mar 24 15:18:09 2010 " "Info: Processing started: Wed Mar 24 15:18:09 2010" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off seven -c seven " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off seven -c seven" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "IMPP_MPP_USER_DEVICE" "seven EP2C20F484C7 " "Info: Selected device EP2C20F484C7 for design \"seven\"" {  } {  } 0 0 "Selected device %2!s! for design \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0 0 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "" 0 -1}
{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Warning: Feature LogicLock is not available with your current license" {  } {  } 0 0 "Feature %1!s! is not available with your current license" 0 0 "" 0 -1}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C15AF484C7 " "Info: Device EP2C15AF484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C35F484C7 " "Info: Device EP2C35F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F484C7 " "Info: Device EP2C50F484C7 is compatible" {  } {  } 2 0 "Device %1!s! is compatible" 0 0 "" 0 -1}  } {  } 2 0 "Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices" 0 0 "" 0 -1}
{ "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION" "3 " "Info: Fitter converted 3 user pins into dedicated programming pins" { { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~ASDO~ C4 " "Info: Pin ~ASDO~ is reserved at location C4" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~ASDO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~ASDO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~nCSO~ C3 " "Info: Pin ~nCSO~ is reserved at location C3" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~nCSO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~nCSO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1} { "Info" "IFIOMGR_RESERVED_PIN_WITH_LOCATION_SUB" "~LVDS91p/nCEO~ W20 " "Info: Pin ~LVDS91p/nCEO~ is reserved at location W20" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { ~LVDS91p/nCEO~ } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { ~LVDS91p/nCEO~ } "NODE_NAME" } }  } 0 0 "Pin %1!s! is reserved at location %2!s!" 0 0 "" 0 -1}  } {  } 0 0 "Fitter converted %1!d! user pins into dedicated programming pins" 0 0 "" 0 -1}
{ "Error" "EFSAC_FSAC_IOS_ASSIGNED_TO_SAME_LOC" "Pin_J2 IOC_X0_Y18_N2 " "Error: Can't place multiple pins assigned to pin location Pin_J2 (IOC_X0_Y18_N2)" { { "Info" "IFSAC_FSAC_DECLARE_IOC_LOCATION_ASSIGNMENT" "b\[0\] Pin_J2 IOC_X0_Y18_N2 " "Info: Pin b\[0\] is assigned to pin location Pin_J2 (IOC_X0_Y18_N2)" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { b[0] } } } { "seven.bdf" "" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { { 104 416 592 120 "b\[0..6\]" "" } } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { b[0] } "NODE_NAME" } }  } 0 0 "Pin %1!s! is assigned to pin location %2!s! (%3!s!)" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_DECLARE_IOC_LOCATION_ASSIGNMENT" "b\[1\] Pin_J2 IOC_X0_Y18_N2 " "Info: Pin b\[1\] is assigned to pin location Pin_J2 (IOC_X0_Y18_N2)" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { b[1] } } } { "seven.bdf" "" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { { 104 416 592 120 "b\[0..6\]" "" } } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { b[1] } "NODE_NAME" } }  } 0 0 "Pin %1!s! is assigned to pin location %2!s! (%3!s!)" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_DECLARE_IOC_LOCATION_ASSIGNMENT" "b\[2\] Pin_J2 IOC_X0_Y18_N2 " "Info: Pin b\[2\] is assigned to pin location Pin_J2 (IOC_X0_Y18_N2)" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { b[2] } } } { "seven.bdf" "" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { { 104 416 592 120 "b\[0..6\]" "" } } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { b[2] } "NODE_NAME" } }  } 0 0 "Pin %1!s! is assigned to pin location %2!s! (%3!s!)" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_DECLARE_IOC_LOCATION_ASSIGNMENT" "b\[3\] Pin_J2 IOC_X0_Y18_N2 " "Info: Pin b\[3\] is assigned to pin location Pin_J2 (IOC_X0_Y18_N2)" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { b[3] } } } { "seven.bdf" "" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { { 104 416 592 120 "b\[0..6\]" "" } } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { b[3] } "NODE_NAME" } }  } 0 0 "Pin %1!s! is assigned to pin location %2!s! (%3!s!)" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_DECLARE_IOC_LOCATION_ASSIGNMENT" "b\[4\] Pin_J2 IOC_X0_Y18_N2 " "Info: Pin b\[4\] is assigned to pin location Pin_J2 (IOC_X0_Y18_N2)" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { b[4] } } } { "seven.bdf" "" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { { 104 416 592 120 "b\[0..6\]" "" } } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { b[4] } "NODE_NAME" } }  } 0 0 "Pin %1!s! is assigned to pin location %2!s! (%3!s!)" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_DECLARE_IOC_LOCATION_ASSIGNMENT" "b\[5\] Pin_J2 IOC_X0_Y18_N2 " "Info: Pin b\[5\] is assigned to pin location Pin_J2 (IOC_X0_Y18_N2)" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { b[5] } } } { "seven.bdf" "" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { { 104 416 592 120 "b\[0..6\]" "" } } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { b[5] } "NODE_NAME" } }  } 0 0 "Pin %1!s! is assigned to pin location %2!s! (%3!s!)" 0 0 "" 0 -1} { "Info" "IFSAC_FSAC_DECLARE_IOC_LOCATION_ASSIGNMENT" "b\[6\] Pin_J2 IOC_X0_Y18_N2 " "Info: Pin b\[6\] is assigned to pin location Pin_J2 (IOC_X0_Y18_N2)" {  } { { "c:/altera/90/quartus/bin/pin_planner.ppl" "" { PinPlanner "c:/altera/90/quartus/bin/pin_planner.ppl" { b[6] } } } { "seven.bdf" "" { Schematic "E:/university/Thirdyear2/DigitalLab/MYWORK/exp7/quartus/vc/seven.bdf" { { 104 416 592 120 "b\[0..6\]" "" } } } } { "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/90/quartus/bin/TimingClosureFloorplan.fld" "" "" { b[6] } "NODE_NAME" } }  } 0 0 "Pin %1!s! is assigned to pin location %2!s! (%3!s!)" 0 0 "" 0 -1}  } {  } 0 0 "Can't place multiple pins assigned to pin location %1!s! (%2!s!)" 0 0 "" 0 -1}
{ "Info" "IFITCC_FITTER_PREPARATION_END" "00:00:00 " "Info: Fitter preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "" 0 -1}
{ "Error" "EFITCC_FITCC_FAIL" "" "Error: Can't fit design in device" {  } {  } 0 0 "Can't fit design in device" 0 0 "" 0 -1}
{ "Error" "EQEXE_ERROR_COUNT" "Fitter 2 s 1  Quartus II " "Error: Quartus II Fitter was unsuccessful. 2 errors, 1 warning" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "217 " "Error: Peak virtual memory: 217 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Error" "EQEXE_END_BANNER_TIME" "Wed Mar 24 15:18:10 2010 " "Error: Processing ended: Wed Mar 24 15:18:10 2010" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Error" "EQEXE_ELAPSED_TIME" "00:00:01 " "Error: Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Error: Total CPU time (on all processors): 00:00:01" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
{ "Error" "EFLOW_ERROR_COUNT" "Full Compilation 4 s 4 s " "Error: Quartus II Full Compilation was unsuccessful. 4 errors, 4 warnings" {  } {  } 0 0 "Quartus II %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
