Classic Timing Analyzer report for SIMCOMP
Wed Apr 21 15:02:06 2010
Quartus II Version 9.0 Build 132 02/25/2009 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. Timing Analyzer Summary
  3. Timing Analyzer Settings
  4. Clock Settings Summary
  5. Parallel Compilation
  6. Clock Setup: 'CLK'
  7. tco
  8. Timing Analyzer Messages



----------------
; Legal Notice ;
----------------
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and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
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Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary                                                                                                                                                                                                               ;
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------+-------------+------------+----------+--------------+
; Type                         ; Slack ; Required Time ; Actual Time                      ; From                                                                                   ; To          ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------+-------------+------------+----------+--------------+
; Worst-case tco               ; N/A   ; None          ; 9.022 ns                         ; IP[10]~reg0                                                                            ; IP[10]      ; CLK        ; --       ; 0            ;
; Clock Setup: 'CLK'           ; N/A   ; None          ; 183.32 MHz ( period = 5.455 ns ) ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; IP[14]~reg0 ; CLK        ; CLK      ; 0            ;
; Total number of failed paths ;       ;               ;                                  ;                                                                                        ;             ;            ;          ; 0            ;
+------------------------------+-------+---------------+----------------------------------+----------------------------------------------------------------------------------------+-------------+------------+----------+--------------+


+--------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings                                                                                           ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Option                                                              ; Setting            ; From ; To ; Entity Name ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name                                                         ; EP2C20F484C7       ;      ;    ;             ;
; Timing Models                                                       ; Final              ;      ;    ;             ;
; Default hold multicycle                                             ; Same as Multicycle ;      ;    ;             ;
; Cut paths between unrelated clock domains                           ; On                 ;      ;    ;             ;
; Cut off read during write signal paths                              ; On                 ;      ;    ;             ;
; Cut off feedback from I/O pins                                      ; On                 ;      ;    ;             ;
; Report Combined Fast/Slow Timing                                    ; Off                ;      ;    ;             ;
; Ignore Clock Settings                                               ; Off                ;      ;    ;             ;
; Analyze latches as synchronous elements                             ; On                 ;      ;    ;             ;
; Enable Recovery/Removal analysis                                    ; Off                ;      ;    ;             ;
; Enable Clock Latency                                                ; Off                ;      ;    ;             ;
; Use TimeQuest Timing Analyzer                                       ; Off                ;      ;    ;             ;
; Minimum Core Junction Temperature                                   ; 0                  ;      ;    ;             ;
; Maximum Core Junction Temperature                                   ; 85                 ;      ;    ;             ;
; Number of source nodes to report per destination node               ; 10                 ;      ;    ;             ;
; Number of destination nodes to report                               ; 10                 ;      ;    ;             ;
; Number of paths to report                                           ; 200                ;      ;    ;             ;
; Report Minimum Timing Checks                                        ; Off                ;      ;    ;             ;
; Use Fast Timing Models                                              ; Off                ;      ;    ;             ;
; Report IO Paths Separately                                          ; Off                ;      ;    ;             ;
; Perform Multicorner Analysis                                        ; On                 ;      ;    ;             ;
; Reports the worst-case path for each clock domain and analysis      ; Off                ;      ;    ;             ;
; Removes common clock path pessimism (CCPP) during slack computation ; Off                ;      ;    ;             ;
; Output I/O Timing Endpoint                                          ; Near End           ;      ;    ;             ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                             ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; CLK             ;                    ; User Pin ; None             ; 0.000 ns      ; 0.000 ns     ; --       ; N/A                   ; N/A                 ; N/A    ;              ;
+-----------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


Parallel compilation was disabled, but you have multiple processors available. Enable parallel compilation to reduce compilation time.
+-------------------------------------+
; Parallel Compilation                ;
+----------------------------+--------+
; Processors                 ; Number ;
+----------------------------+--------+
; Number detected on machine ; 2      ;
; Maximum allowed            ; 1      ;
+----------------------------+--------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'CLK'                                                                                                                                                                                                                                                                                                                                                                          ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                   ; To                                                                                     ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 183.32 MHz ( period = 5.455 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; IP[14]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.149 ns                ;
; N/A                                     ; 183.32 MHz ( period = 5.455 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; IP[14]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.149 ns                ;
; N/A                                     ; 183.32 MHz ( period = 5.455 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; IP[14]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.149 ns                ;
; N/A                                     ; 183.32 MHz ( period = 5.455 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; IP[14]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.149 ns                ;
; N/A                                     ; 183.32 MHz ( period = 5.455 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; IP[14]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.149 ns                ;
; N/A                                     ; 183.32 MHz ( period = 5.455 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; IP[14]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.149 ns                ;
; N/A                                     ; 184.03 MHz ( period = 5.434 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; IP[13]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.128 ns                ;
; N/A                                     ; 184.03 MHz ( period = 5.434 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; IP[13]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.128 ns                ;
; N/A                                     ; 184.03 MHz ( period = 5.434 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; IP[13]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.128 ns                ;
; N/A                                     ; 184.03 MHz ( period = 5.434 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; IP[13]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.128 ns                ;
; N/A                                     ; 184.03 MHz ( period = 5.434 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; IP[13]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.128 ns                ;
; N/A                                     ; 184.03 MHz ( period = 5.434 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; IP[13]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 5.128 ns                ;
; N/A                                     ; 186.05 MHz ( period = 5.375 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[11]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 5.067 ns                ;
; N/A                                     ; 186.05 MHz ( period = 5.375 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[11]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 5.067 ns                ;
; N/A                                     ; 186.05 MHz ( period = 5.375 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[11]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 5.067 ns                ;
; N/A                                     ; 186.05 MHz ( period = 5.375 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[11]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 5.067 ns                ;
; N/A                                     ; 186.05 MHz ( period = 5.375 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[11]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 5.067 ns                ;
; N/A                                     ; 186.05 MHz ( period = 5.375 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[11]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 5.067 ns                ;
; N/A                                     ; 190.91 MHz ( period = 5.238 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[9]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.930 ns                ;
; N/A                                     ; 190.91 MHz ( period = 5.238 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[9]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.930 ns                ;
; N/A                                     ; 190.91 MHz ( period = 5.238 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[9]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.930 ns                ;
; N/A                                     ; 190.91 MHz ( period = 5.238 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[9]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.930 ns                ;
; N/A                                     ; 190.91 MHz ( period = 5.238 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[9]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.930 ns                ;
; N/A                                     ; 190.91 MHz ( period = 5.238 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[9]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.930 ns                ;
; N/A                                     ; 191.90 MHz ( period = 5.211 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[7]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.903 ns                ;
; N/A                                     ; 191.90 MHz ( period = 5.211 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[7]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.903 ns                ;
; N/A                                     ; 191.90 MHz ( period = 5.211 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[7]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.903 ns                ;
; N/A                                     ; 191.90 MHz ( period = 5.211 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[7]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.903 ns                ;
; N/A                                     ; 191.90 MHz ( period = 5.211 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[7]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.903 ns                ;
; N/A                                     ; 191.90 MHz ( period = 5.211 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[7]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.903 ns                ;
; N/A                                     ; 192.20 MHz ( period = 5.203 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[8]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.895 ns                ;
; N/A                                     ; 192.20 MHz ( period = 5.203 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[8]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.895 ns                ;
; N/A                                     ; 192.20 MHz ( period = 5.203 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[8]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.895 ns                ;
; N/A                                     ; 192.20 MHz ( period = 5.203 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[8]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.895 ns                ;
; N/A                                     ; 192.20 MHz ( period = 5.203 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[8]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.895 ns                ;
; N/A                                     ; 192.20 MHz ( period = 5.203 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[8]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.895 ns                ;
; N/A                                     ; 192.23 MHz ( period = 5.202 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; IP[12]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.894 ns                ;
; N/A                                     ; 192.23 MHz ( period = 5.202 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; IP[12]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.894 ns                ;
; N/A                                     ; 192.23 MHz ( period = 5.202 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; IP[12]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.894 ns                ;
; N/A                                     ; 192.23 MHz ( period = 5.202 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; IP[12]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.894 ns                ;
; N/A                                     ; 192.23 MHz ( period = 5.202 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; IP[12]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.894 ns                ;
; N/A                                     ; 192.23 MHz ( period = 5.202 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; IP[12]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.894 ns                ;
; N/A                                     ; 192.57 MHz ( period = 5.193 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[10]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.885 ns                ;
; N/A                                     ; 192.57 MHz ( period = 5.193 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[10]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.885 ns                ;
; N/A                                     ; 192.57 MHz ( period = 5.193 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[10]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.885 ns                ;
; N/A                                     ; 192.57 MHz ( period = 5.193 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[10]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.885 ns                ;
; N/A                                     ; 192.57 MHz ( period = 5.193 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[10]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.885 ns                ;
; N/A                                     ; 192.57 MHz ( period = 5.193 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[10]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.885 ns                ;
; N/A                                     ; 192.64 MHz ( period = 5.191 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; IP[15]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.883 ns                ;
; N/A                                     ; 192.64 MHz ( period = 5.191 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; IP[15]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.883 ns                ;
; N/A                                     ; 192.64 MHz ( period = 5.191 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; IP[15]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.883 ns                ;
; N/A                                     ; 192.64 MHz ( period = 5.191 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; IP[15]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.883 ns                ;
; N/A                                     ; 192.64 MHz ( period = 5.191 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; IP[15]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.883 ns                ;
; N/A                                     ; 192.64 MHz ( period = 5.191 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; IP[15]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.883 ns                ;
; N/A                                     ; 192.83 MHz ( period = 5.186 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[3]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.877 ns                ;
; N/A                                     ; 192.83 MHz ( period = 5.186 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[3]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.877 ns                ;
; N/A                                     ; 192.83 MHz ( period = 5.186 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[3]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.877 ns                ;
; N/A                                     ; 192.83 MHz ( period = 5.186 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[3]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.877 ns                ;
; N/A                                     ; 192.83 MHz ( period = 5.186 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[3]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.877 ns                ;
; N/A                                     ; 192.83 MHz ( period = 5.186 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[3]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.877 ns                ;
; N/A                                     ; 193.16 MHz ( period = 5.177 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[5]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.868 ns                ;
; N/A                                     ; 193.16 MHz ( period = 5.177 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[5]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.868 ns                ;
; N/A                                     ; 193.16 MHz ( period = 5.177 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[5]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.868 ns                ;
; N/A                                     ; 193.16 MHz ( period = 5.177 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[5]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.868 ns                ;
; N/A                                     ; 193.16 MHz ( period = 5.177 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[5]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.868 ns                ;
; N/A                                     ; 193.16 MHz ( period = 5.177 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[5]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.868 ns                ;
; N/A                                     ; 195.73 MHz ( period = 5.109 ns )                    ; MAR[4]~reg0                                                                            ; IP[14]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.871 ns                ;
; N/A                                     ; 196.31 MHz ( period = 5.094 ns )                    ; MAR[4]~reg0                                                                            ; IP[13]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.856 ns                ;
; N/A                                     ; 200.84 MHz ( period = 4.979 ns )                    ; MAR[2]~reg0                                                                            ; IP[14]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.741 ns                ;
; N/A                                     ; 201.45 MHz ( period = 4.964 ns )                    ; MAR[2]~reg0                                                                            ; IP[13]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.726 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[1]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[1]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[1]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[1]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[1]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[1]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[2]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[2]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[2]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[2]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[2]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.51 MHz ( period = 4.938 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[2]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.629 ns                ;
; N/A                                     ; 202.63 MHz ( period = 4.935 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[6]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.626 ns                ;
; N/A                                     ; 202.63 MHz ( period = 4.935 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[6]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.626 ns                ;
; N/A                                     ; 202.63 MHz ( period = 4.935 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[6]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.626 ns                ;
; N/A                                     ; 202.63 MHz ( period = 4.935 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[6]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.626 ns                ;
; N/A                                     ; 202.63 MHz ( period = 4.935 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[6]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.626 ns                ;
; N/A                                     ; 202.63 MHz ( period = 4.935 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[6]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.626 ns                ;
; N/A                                     ; 202.80 MHz ( period = 4.931 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[0]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.622 ns                ;
; N/A                                     ; 202.80 MHz ( period = 4.931 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[0]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.622 ns                ;
; N/A                                     ; 202.80 MHz ( period = 4.931 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[0]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.622 ns                ;
; N/A                                     ; 202.80 MHz ( period = 4.931 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[0]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.622 ns                ;
; N/A                                     ; 202.80 MHz ( period = 4.931 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[0]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.622 ns                ;
; N/A                                     ; 202.80 MHz ( period = 4.931 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[0]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.622 ns                ;
; N/A                                     ; 205.30 MHz ( period = 4.871 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[4]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.562 ns                ;
; N/A                                     ; 205.30 MHz ( period = 4.871 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[4]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.562 ns                ;
; N/A                                     ; 205.30 MHz ( period = 4.871 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[4]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.562 ns                ;
; N/A                                     ; 205.30 MHz ( period = 4.871 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[4]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.562 ns                ;
; N/A                                     ; 205.30 MHz ( period = 4.871 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[4]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.562 ns                ;
; N/A                                     ; 205.30 MHz ( period = 4.871 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[4]~reg0                                                                            ; CLK        ; CLK      ; None                        ; None                      ; 4.562 ns                ;
; N/A                                     ; 206.70 MHz ( period = 4.838 ns )                    ; MAR[4]~reg0                                                                            ; MBR[11]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.598 ns                ;
; N/A                                     ; 209.64 MHz ( period = 4.770 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; IP[9]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.462 ns                ;
; N/A                                     ; 209.64 MHz ( period = 4.770 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; IP[9]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.462 ns                ;
; N/A                                     ; 209.64 MHz ( period = 4.770 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; IP[9]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.462 ns                ;
; N/A                                     ; 209.64 MHz ( period = 4.770 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; IP[9]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.462 ns                ;
; N/A                                     ; 209.64 MHz ( period = 4.770 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; IP[9]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.462 ns                ;
; N/A                                     ; 209.64 MHz ( period = 4.770 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; IP[9]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.462 ns                ;
; N/A                                     ; 210.61 MHz ( period = 4.748 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[14]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.441 ns                ;
; N/A                                     ; 210.61 MHz ( period = 4.748 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[14]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.441 ns                ;
; N/A                                     ; 210.61 MHz ( period = 4.748 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[14]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.441 ns                ;
; N/A                                     ; 210.61 MHz ( period = 4.748 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[14]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.441 ns                ;
; N/A                                     ; 210.61 MHz ( period = 4.748 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[14]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.441 ns                ;
; N/A                                     ; 210.61 MHz ( period = 4.748 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[14]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.441 ns                ;
; N/A                                     ; 210.88 MHz ( period = 4.742 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; MBR[13]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.435 ns                ;
; N/A                                     ; 210.88 MHz ( period = 4.742 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; MBR[13]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.435 ns                ;
; N/A                                     ; 210.88 MHz ( period = 4.742 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; MBR[13]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.435 ns                ;
; N/A                                     ; 210.88 MHz ( period = 4.742 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[13]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.435 ns                ;
; N/A                                     ; 210.88 MHz ( period = 4.742 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[13]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.435 ns                ;
; N/A                                     ; 210.88 MHz ( period = 4.742 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[13]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.435 ns                ;
; N/A                                     ; 211.15 MHz ( period = 4.736 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; IP[8]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.428 ns                ;
; N/A                                     ; 211.15 MHz ( period = 4.736 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; IP[8]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.428 ns                ;
; N/A                                     ; 211.15 MHz ( period = 4.736 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; IP[8]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.428 ns                ;
; N/A                                     ; 211.15 MHz ( period = 4.736 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; IP[8]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.428 ns                ;
; N/A                                     ; 211.15 MHz ( period = 4.736 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; IP[8]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.428 ns                ;
; N/A                                     ; 211.15 MHz ( period = 4.736 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; IP[8]~reg0                                                                             ; CLK        ; CLK      ; None                        ; None                      ; 4.428 ns                ;
; N/A                                     ; 211.19 MHz ( period = 4.735 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; MBR[12]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.427 ns                ;
; N/A                                     ; 211.19 MHz ( period = 4.735 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; MBR[12]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.427 ns                ;
; N/A                                     ; 211.19 MHz ( period = 4.735 ns )                    ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; MBR[12]~reg0                                                                           ; CLK        ; CLK      ; None                        ; None                      ; 4.427 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[1]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; CLK        ; CLK      ; None                        ; None                      ; 3.703 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; PC[0]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 3.632 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[12]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_we_reg       ; CLK        ; CLK      ; None                        ; None                      ; 3.388 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0000                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 3.397 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; PC[3]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; CLK        ; CLK      ; None                        ; None                      ; 3.368 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; PC[2]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; CLK        ; CLK      ; None                        ; None                      ; 3.233 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[0]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 3.195 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; PC[5]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; CLK        ; CLK      ; None                        ; None                      ; 3.098 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; PC[1]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; CLK        ; CLK      ; None                        ; None                      ; 3.034 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0000                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; CLK        ; CLK      ; None                        ; None                      ; 2.936 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[3]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; CLK        ; CLK      ; None                        ; None                      ; 2.901 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; PC[4]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; CLK        ; CLK      ; None                        ; None                      ; 2.889 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[5]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; CLK        ; CLK      ; None                        ; None                      ; 2.872 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg0  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg1  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a1~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg2  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a2~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg3  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a3~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg4  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a4~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg5  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a5~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg6  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a6~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg7  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a7~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg8  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a8~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg9  ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a9~porta_memory_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg10 ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a10~porta_memory_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg11 ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a11~porta_memory_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg12 ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a12~porta_memory_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg13 ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a13~porta_memory_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg14 ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a14~porta_memory_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg15 ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a15~porta_memory_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[4]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; CLK        ; CLK      ; None                        ; None                      ; 2.869 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0010                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; CLK        ; CLK      ; None                        ; None                      ; 2.861 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0000                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; CLK        ; CLK      ; None                        ; None                      ; 2.815 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0100                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_we_reg       ; CLK        ; CLK      ; None                        ; None                      ; 2.773 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[2]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; CLK        ; CLK      ; None                        ; None                      ; 2.780 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[13]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_we_reg       ; CLK        ; CLK      ; None                        ; None                      ; 2.715 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0010                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; CLK        ; CLK      ; None                        ; None                      ; 2.735 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0010                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; CLK        ; CLK      ; None                        ; None                      ; 2.693 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0000                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; CLK        ; CLK      ; None                        ; None                      ; 2.679 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[14]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_we_reg       ; CLK        ; CLK      ; None                        ; None                      ; 2.632 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0000                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; CLK        ; CLK      ; None                        ; None                      ; 2.661 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[1]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; CLK        ; CLK      ; None                        ; None                      ; 2.617 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[15]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_we_reg       ; CLK        ; CLK      ; None                        ; None                      ; 2.560 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0010                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; CLK        ; CLK      ; None                        ; None                      ; 2.592 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0010                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 2.590 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[2]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg2 ; CLK        ; CLK      ; None                        ; None                      ; 2.563 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0000                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; CLK        ; CLK      ; None                        ; None                      ; 2.537 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; state.0010                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg1 ; CLK        ; CLK      ; None                        ; None                      ; 2.469 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[3]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg3 ; CLK        ; CLK      ; None                        ; None                      ; 2.286 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[4]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg4 ; CLK        ; CLK      ; None                        ; None                      ; 2.277 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[3]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_address_reg3 ; CLK        ; CLK      ; None                        ; None                      ; 2.168 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[1]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_address_reg1 ; CLK        ; CLK      ; None                        ; None                      ; 2.143 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[0]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 2.172 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; IP[5]~reg0                                                                             ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg5 ; CLK        ; CLK      ; None                        ; None                      ; 2.138 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[2]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_address_reg2 ; CLK        ; CLK      ; None                        ; None                      ; 1.829 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[7]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg7  ; CLK        ; CLK      ; None                        ; None                      ; 1.828 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[14]~reg0                                                                           ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg14 ; CLK        ; CLK      ; None                        ; None                      ; 1.821 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[5]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_address_reg5 ; CLK        ; CLK      ; None                        ; None                      ; 1.492 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[13]~reg0                                                                           ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg13 ; CLK        ; CLK      ; None                        ; None                      ; 1.469 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[15]~reg0                                                                           ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg15 ; CLK        ; CLK      ; None                        ; None                      ; 1.201 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[4]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_address_reg4 ; CLK        ; CLK      ; None                        ; None                      ; 1.190 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MAR[0]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_address_reg0 ; CLK        ; CLK      ; None                        ; None                      ; 1.180 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[10]~reg0                                                                           ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg10 ; CLK        ; CLK      ; None                        ; None                      ; 1.150 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[8]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg8  ; CLK        ; CLK      ; None                        ; None                      ; 1.147 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[2]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg2  ; CLK        ; CLK      ; None                        ; None                      ; 1.144 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[3]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg3  ; CLK        ; CLK      ; None                        ; None                      ; 1.143 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[5]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg5  ; CLK        ; CLK      ; None                        ; None                      ; 1.143 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[0]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg0  ; CLK        ; CLK      ; None                        ; None                      ; 1.134 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[1]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg1  ; CLK        ; CLK      ; None                        ; None                      ; 1.134 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[11]~reg0                                                                           ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg11 ; CLK        ; CLK      ; None                        ; None                      ; 1.125 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[4]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg4  ; CLK        ; CLK      ; None                        ; None                      ; 1.124 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[12]~reg0                                                                           ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg12 ; CLK        ; CLK      ; None                        ; None                      ; 1.121 ns                ;
; N/A                                     ; Restricted to 195.01 MHz ( period = 5.128 ns )      ; MBR[6]~reg0                                                                            ; altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~porta_datain_reg6  ; CLK        ; CLK      ; None                        ; None                      ; 1.120 ns                ;
; Timing analysis restricted to 200 rows. ; To change the limit use Settings (Assignments menu) ;                                                                                        ;                                                                                        ;            ;          ;                             ;                           ;                         ;
+-----------------------------------------+-----------------------------------------------------+----------------------------------------------------------------------------------------+----------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+-------------------------------------------------------------------------+
; tco                                                                     ;
+-------+--------------+------------+--------------+---------+------------+
; Slack ; Required tco ; Actual tco ; From         ; To      ; From Clock ;
+-------+--------------+------------+--------------+---------+------------+
; N/A   ; None         ; 9.022 ns   ; IP[10]~reg0  ; IP[10]  ; CLK        ;
; N/A   ; None         ; 9.014 ns   ; IP[5]~reg0   ; IP[5]   ; CLK        ;
; N/A   ; None         ; 8.951 ns   ; AC[7]~reg0   ; AC[7]   ; CLK        ;
; N/A   ; None         ; 8.798 ns   ; AC[8]~reg0   ; AC[8]   ; CLK        ;
; N/A   ; None         ; 8.394 ns   ; PC[6]~reg0   ; PC[6]   ; CLK        ;
; N/A   ; None         ; 8.388 ns   ; MAR[7]~reg0  ; MAR[7]  ; CLK        ;
; N/A   ; None         ; 8.377 ns   ; MAR[9]~reg0  ; MAR[9]  ; CLK        ;
; N/A   ; None         ; 8.347 ns   ; MBR[4]~reg0  ; MBR[4]  ; CLK        ;
; N/A   ; None         ; 8.112 ns   ; IP[7]~reg0   ; IP[7]   ; CLK        ;
; N/A   ; None         ; 8.057 ns   ; IP[3]~reg0   ; IP[3]   ; CLK        ;
; N/A   ; None         ; 7.927 ns   ; MAR[3]~reg0  ; MAR[3]  ; CLK        ;
; N/A   ; None         ; 7.884 ns   ; IP[8]~reg0   ; IP[8]   ; CLK        ;
; N/A   ; None         ; 7.851 ns   ; MAR[1]~reg0  ; MAR[1]  ; CLK        ;
; N/A   ; None         ; 7.829 ns   ; AC[13]~reg0  ; AC[13]  ; CLK        ;
; N/A   ; None         ; 7.810 ns   ; IP[2]~reg0   ; IP[2]   ; CLK        ;
; N/A   ; None         ; 7.797 ns   ; AC[0]~reg0   ; AC[0]   ; CLK        ;
; N/A   ; None         ; 7.785 ns   ; MAR[0]~reg0  ; MAR[0]  ; CLK        ;
; N/A   ; None         ; 7.785 ns   ; IP[12]~reg0  ; IP[12]  ; CLK        ;
; N/A   ; None         ; 7.780 ns   ; MAR[5]~reg0  ; MAR[5]  ; CLK        ;
; N/A   ; None         ; 7.762 ns   ; IP[6]~reg0   ; IP[6]   ; CLK        ;
; N/A   ; None         ; 7.739 ns   ; MBR[9]~reg0  ; MBR[9]  ; CLK        ;
; N/A   ; None         ; 7.720 ns   ; MBR[1]~reg0  ; MBR[1]  ; CLK        ;
; N/A   ; None         ; 7.688 ns   ; PC[11]~reg0  ; PC[11]  ; CLK        ;
; N/A   ; None         ; 7.685 ns   ; MBR[0]~reg0  ; MBR[0]  ; CLK        ;
; N/A   ; None         ; 7.680 ns   ; MBR[3]~reg0  ; MBR[3]  ; CLK        ;
; N/A   ; None         ; 7.674 ns   ; MBR[6]~reg0  ; MBR[6]  ; CLK        ;
; N/A   ; None         ; 7.665 ns   ; MBR[5]~reg0  ; MBR[5]  ; CLK        ;
; N/A   ; None         ; 7.664 ns   ; MBR[15]~reg0 ; MBR[15] ; CLK        ;
; N/A   ; None         ; 7.607 ns   ; MBR[2]~reg0  ; MBR[2]  ; CLK        ;
; N/A   ; None         ; 7.578 ns   ; AC[4]~reg0   ; AC[4]   ; CLK        ;
; N/A   ; None         ; 7.569 ns   ; AC[12]~reg0  ; AC[12]  ; CLK        ;
; N/A   ; None         ; 7.566 ns   ; AC[3]~reg0   ; AC[3]   ; CLK        ;
; N/A   ; None         ; 7.556 ns   ; AC[2]~reg0   ; AC[2]   ; CLK        ;
; N/A   ; None         ; 7.553 ns   ; AC[15]~reg0  ; AC[15]  ; CLK        ;
; N/A   ; None         ; 7.552 ns   ; AC[11]~reg0  ; AC[11]  ; CLK        ;
; N/A   ; None         ; 7.542 ns   ; AC[6]~reg0   ; AC[6]   ; CLK        ;
; N/A   ; None         ; 7.538 ns   ; AC[1]~reg0   ; AC[1]   ; CLK        ;
; N/A   ; None         ; 7.520 ns   ; IP[0]~reg0   ; IP[0]   ; CLK        ;
; N/A   ; None         ; 7.478 ns   ; MBR[12]~reg0 ; MBR[12] ; CLK        ;
; N/A   ; None         ; 7.471 ns   ; MBR[10]~reg0 ; MBR[10] ; CLK        ;
; N/A   ; None         ; 7.459 ns   ; MBR[14]~reg0 ; MBR[14] ; CLK        ;
; N/A   ; None         ; 7.449 ns   ; MBR[8]~reg0  ; MBR[8]  ; CLK        ;
; N/A   ; None         ; 7.448 ns   ; IP[11]~reg0  ; IP[11]  ; CLK        ;
; N/A   ; None         ; 7.444 ns   ; MAR[2]~reg0  ; MAR[2]  ; CLK        ;
; N/A   ; None         ; 7.441 ns   ; MAR[4]~reg0  ; MAR[4]  ; CLK        ;
; N/A   ; None         ; 7.419 ns   ; MBR[7]~reg0  ; MBR[7]  ; CLK        ;
; N/A   ; None         ; 7.336 ns   ; IP[4]~reg0   ; IP[4]   ; CLK        ;
; N/A   ; None         ; 7.330 ns   ; PC[2]~reg0   ; PC[2]   ; CLK        ;
; N/A   ; None         ; 7.323 ns   ; AC[5]~reg0   ; AC[5]   ; CLK        ;
; N/A   ; None         ; 7.313 ns   ; PC[1]~reg0   ; PC[1]   ; CLK        ;
; N/A   ; None         ; 7.296 ns   ; MAR[6]~reg0  ; MAR[6]  ; CLK        ;
; N/A   ; None         ; 7.269 ns   ; MBR[13]~reg0 ; MBR[13] ; CLK        ;
; N/A   ; None         ; 7.269 ns   ; IP[14]~reg0  ; IP[14]  ; CLK        ;
; N/A   ; None         ; 7.256 ns   ; AC[14]~reg0  ; AC[14]  ; CLK        ;
; N/A   ; None         ; 7.253 ns   ; IP[9]~reg0   ; IP[9]   ; CLK        ;
; N/A   ; None         ; 7.249 ns   ; MBR[11]~reg0 ; MBR[11] ; CLK        ;
; N/A   ; None         ; 7.248 ns   ; IP[1]~reg0   ; IP[1]   ; CLK        ;
; N/A   ; None         ; 7.193 ns   ; PC[7]~reg0   ; PC[7]   ; CLK        ;
; N/A   ; None         ; 7.193 ns   ; PC[5]~reg0   ; PC[5]   ; CLK        ;
; N/A   ; None         ; 7.182 ns   ; MAR[8]~reg0  ; MAR[8]  ; CLK        ;
; N/A   ; None         ; 7.166 ns   ; PC[0]~reg0   ; PC[0]   ; CLK        ;
; N/A   ; None         ; 7.155 ns   ; PC[4]~reg0   ; PC[4]   ; CLK        ;
; N/A   ; None         ; 7.128 ns   ; PC[8]~reg0   ; PC[8]   ; CLK        ;
; N/A   ; None         ; 7.108 ns   ; PC[3]~reg0   ; PC[3]   ; CLK        ;
; N/A   ; None         ; 7.090 ns   ; IP[15]~reg0  ; IP[15]  ; CLK        ;
; N/A   ; None         ; 6.975 ns   ; AC[10]~reg0  ; AC[10]  ; CLK        ;
; N/A   ; None         ; 6.970 ns   ; AC[9]~reg0   ; AC[9]   ; CLK        ;
; N/A   ; None         ; 6.823 ns   ; IP[13]~reg0  ; IP[13]  ; CLK        ;
; N/A   ; None         ; 6.803 ns   ; PC[9]~reg0   ; PC[9]   ; CLK        ;
; N/A   ; None         ; 6.789 ns   ; PC[10]~reg0  ; PC[10]  ; CLK        ;
; N/A   ; None         ; 6.757 ns   ; MAR[11]~reg0 ; MAR[11] ; CLK        ;
; N/A   ; None         ; 6.750 ns   ; MAR[10]~reg0 ; MAR[10] ; CLK        ;
+-------+--------------+------------+--------------+---------+------------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
    Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition
    Info: Processing started: Wed Apr 21 15:02:04 2010
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off SIMCOMP -c SIMCOMP --timing_analysis_only
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "CLK" is an undefined clock
Info: Clock "CLK" has Internal fmax of 183.32 MHz between source memory "altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0" and destination register "IP[14]~reg0" (period= 5.455 ns)
    Info: + Longest memory to register delay is 5.149 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = M4K_X41_Y22; Fanout = 16; MEM Node = 'altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0'
        Info: 2: + IC(0.000 ns) + CELL(3.374 ns) = 3.374 ns; Loc. = M4K_X41_Y22; Fanout = 1; MEM Node = 'altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a14'
        Info: 3: + IC(0.793 ns) + CELL(0.178 ns) = 4.345 ns; Loc. = LCCOMB_X45_Y22_N18; Fanout = 2; COMB Node = 'MBR[14]~15'
        Info: 4: + IC(0.530 ns) + CELL(0.178 ns) = 5.053 ns; Loc. = LCCOMB_X46_Y22_N10; Fanout = 1; COMB Node = 'IP[14]~reg0feeder'
        Info: 5: + IC(0.000 ns) + CELL(0.096 ns) = 5.149 ns; Loc. = LCFF_X46_Y22_N11; Fanout = 6; REG Node = 'IP[14]~reg0'
        Info: Total cell delay = 3.826 ns ( 74.31 % )
        Info: Total interconnect delay = 1.323 ns ( 25.69 % )
    Info: - Smallest clock skew is -0.110 ns
        Info: + Shortest clock path from clock "CLK" to destination register is 2.859 ns
            Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_M1; Fanout = 1; CLK Node = 'CLK'
            Info: 2: + IC(0.238 ns) + CELL(0.000 ns) = 1.264 ns; Loc. = CLKCTRL_G3; Fanout = 145; COMB Node = 'CLK~clkctrl'
            Info: 3: + IC(0.993 ns) + CELL(0.602 ns) = 2.859 ns; Loc. = LCFF_X46_Y22_N11; Fanout = 6; REG Node = 'IP[14]~reg0'
            Info: Total cell delay = 1.628 ns ( 56.94 % )
            Info: Total interconnect delay = 1.231 ns ( 43.06 % )
        Info: - Longest clock path from clock "CLK" to source memory is 2.969 ns
            Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_M1; Fanout = 1; CLK Node = 'CLK'
            Info: 2: + IC(0.238 ns) + CELL(0.000 ns) = 1.264 ns; Loc. = CLKCTRL_G3; Fanout = 145; COMB Node = 'CLK~clkctrl'
            Info: 3: + IC(0.922 ns) + CELL(0.783 ns) = 2.969 ns; Loc. = M4K_X41_Y22; Fanout = 16; MEM Node = 'altsyncram:Memory_rtl_0|altsyncram_qcn1:auto_generated|ram_block1a0~portb_address_reg0'
            Info: Total cell delay = 1.809 ns ( 60.93 % )
            Info: Total interconnect delay = 1.160 ns ( 39.07 % )
    Info: + Micro clock to output delay of source is 0.234 ns
    Info: + Micro setup delay of destination is -0.038 ns
Info: tco from clock "CLK" to destination pin "IP[10]" through register "IP[10]~reg0" is 9.022 ns
    Info: + Longest clock path from clock "CLK" to source register is 2.857 ns
        Info: 1: + IC(0.000 ns) + CELL(1.026 ns) = 1.026 ns; Loc. = PIN_M1; Fanout = 1; CLK Node = 'CLK'
        Info: 2: + IC(0.238 ns) + CELL(0.000 ns) = 1.264 ns; Loc. = CLKCTRL_G3; Fanout = 145; COMB Node = 'CLK~clkctrl'
        Info: 3: + IC(0.991 ns) + CELL(0.602 ns) = 2.857 ns; Loc. = LCFF_X43_Y22_N11; Fanout = 2; REG Node = 'IP[10]~reg0'
        Info: Total cell delay = 1.628 ns ( 56.98 % )
        Info: Total interconnect delay = 1.229 ns ( 43.02 % )
    Info: + Micro clock to output delay of source is 0.277 ns
    Info: + Longest register to pin delay is 5.888 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X43_Y22_N11; Fanout = 2; REG Node = 'IP[10]~reg0'
        Info: 2: + IC(2.892 ns) + CELL(2.996 ns) = 5.888 ns; Loc. = PIN_T16; Fanout = 0; PIN Node = 'IP[10]'
        Info: Total cell delay = 2.996 ns ( 50.88 % )
        Info: Total interconnect delay = 2.892 ns ( 49.12 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 1 warning
    Info: Peak virtual memory: 160 megabytes
    Info: Processing ended: Wed Apr 21 15:02:06 2010
    Info: Elapsed time: 00:00:02
    Info: Total CPU time (on all processors): 00:00:02


