// Copyright (C) 1991-2009 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// Generated by Quartus II Version 9.0 (Build Build 132 02/25/2009)
// Created on Wed Mar 17 00:25:19 2010

alu alu_inst
(
	.A(A_sig) ,	// input [3:0] A_sig
	.B(B_sig) ,	// input [3:0] B_sig
	.X(X_sig) ,	// input [1:0] X_sig
	.res(res_sig) 	// output [3:0] res_sig
);

